| PART |
Description |
Maker |
| HD74LS73A 74LS73 74LS73A HD74LS73ARP |
Dual J-K Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC 触发器|双|焦 K型|编号LS - TTL电|专科| 14PIN |塑料
Dual J-K Flip-Flops(双J-K触发 JK触发器（JK触发器）
|
HITACHI[Hitachi Semiconductor]
Microchip Technology, Inc.
Hitachi,Ltd.
|
| HD74HCT74A HD74HCT74AT HD74HCT74AFP |
Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|TSSOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|SOP|14PIN|PLASTIC
|
Hitachi,Ltd.
HITACHI[Hitachi Semiconductor]
|
| HD74HC107 |
Dual J-K Flip-Flops (with Clear)
|
Hitachi Semiconductor
|
| HD74LS73A HD74LS73AP HD74LS73ARPEL |
Dual J-K Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| HD74ALVCH16820 |
3.3-V 10-bit Flip Flops with Dual Outputs
|
HITACHI[Hitachi Semiconductor]
|
| DM7473 |
Dual Master-Slave J-K Flip-Flops
|
Fairchild
|
| MM74C7304 |
Dual J-K Flip-Flops with Clear and Preset
|
Fairchild Semiconductor
|
| HD74HC112 HD74HC112FPEL HD74HC112P |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| HD74HC109 HD74HC109RPEL HD74HC109FPEL HD74HC109P |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| HD74LVC74 |
Dual D-type Flip-Flops with Preset and Clear
|
Hitachi Semiconductor
|
| RD74LVC74BFPEL RD74LVC74BTELL |
Dual D-type Flip Flops with Preset and Clear
|
Renesas Electronics Corporation
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
